Printed circuit boards find a wide variety of uses in the electronics industry with the demand for high performance, printed wiring, or circuit boards for various applications steadily increasing. For instance, the complexity, compactness and electrical performance requirements of printed boards have significantly increased over the last several years.
The demands on printed circuit boards require high density packaging, fine interconnection, multilayer formation and the need to form a plurality of interconnections in a small space.
Currently, printed circuit board interconnection levels are built on top of a dielectric thin film layer. Circuitry features are formed using photolithographic and subtractive etch techniques. In a typical method, a metallic foil and especially copper foil is laminated to the substrate followed by using photolithographic and subtractive etching to create the circuitry. The copper foil includes a roughened or dendritic backside surface for inducing mechanical adhesion to the substrate. Smooth copper layers do not adequately bond without an auxiliary bonding agent.
Great difficulties exist in adequately etching dendrites especially when dealing with small spaces. Moreover, along with the concern created by dendrites, the width of the lines (e.g. about 0.5 mils wide), and photolithographic issues (e.g. resolution of fine features, 0.7 mil wire with 1.1 mil space, in a thin photo resist film), and subtractive etch undercut/pad rounding, render clearly and fully resolving small line spaces such as the 1.8 mil pitch features presently desired very difficult. Additionally, this subtractive etch approach results in unprotected circuitry features referred to as “skyscrapers” that extend above an underlying plane of dielectric barrier material.
In many structures, it is important to plate another metal such as gold or nickel gold onto the copper circuitry. The “skyscraper” structure causes a problem of bridging or shorting between lines especially where there exist closely spaced features.